England - PCB Layout - Los Angeles, CA, USA

Mark England

Los Angeles, CA, USA


PCB Layout

  • Full time
  • Part time
  • One time
  • Contract
  • Temp


Ability to handle a variety of design areas: RF, High speed digital, HDI, mixed signal, high voltage, impedance matching, diff pair length matching, bus matching.

Work History

PCB Designer (Contract)

Peak Technical Staffing

From October 2013

Subject matter expert responsible for PCB design activities using PADs PCB 9.4/9.5, OrCAD 16.5, CAM350 v9 and PADs Logic. Handled total re-layout of a 6 GB serial link simulation PCB for Qualcomm, Initial layout of a DriveCAM PCB and pieces of other designs along the way.

Senior Hardware Design Engineer

Accellent Technologies Incorporated

May 2011 - September 2013

Key leader maintaining responsibility for SHM custom flex circuits for installation in customer application areas, selecting / procuring components for end applications, and for data-acquisition instrument design in the support of piezoelectric based structural health monitoring applications. Transitioned from OrCAD layout to PADs 9.4 to avoid OrCAD layout's rumored phaseout.

Senior PCB Design Engineer

Hytek Designs

Subject matter expert responsible for PCB design activities using PADs PCB v6 through PADs v9.2 in various contracts and 'in-house' placement assignments while implementing various types of PCB design including analog, RF, high speed digital, and controlled impedance designs.

PCB Design Engineer


July 2002 - July 2004

Successfully maintained responsibility for schematic capture, BOM generation, PCB layout design using PADs PCB v5.x, DRC checking, and Gerber generation for cellphones in a high volume manufacturing environment.

Senior Hardware Design Engineer


August 1998 - June 2002

Effectively designed eight PCBs used in next generation cell phones while designing four software development boards for implementing cell phone software issues and handling multiple revisions to solve various RF, ESD, EMI, and software issues.

• Resolved RF, hardware, and software issues with further revisions of the board resulting in the first prototype revision being able to make a call and the first reference design helping to earn a $50,000,000 contract.

• Assumed board design responsibilities to jumpstart directionless project including designing initial prototype which enabled software development for the cell phone reference design.

Digital Design Engineer

CIDCO Incorporated

Successfully designed next generation internet phone designs while improving the ESD capability from 4KV to 10KV of previous generation iPhone CPU board and integrating mechanical design constraints into PC board development which involved ESD, EMI, acoustics, and circuit board placement.

Staff Engineer

AVC Technology

Wrote interface specifications for video conferencing chipset including working out timing protocols and helping to write the technical documentation for the video compression chip.

• Wrote simple tests in C to help debug the data transport chip while working with Diamond Multimedia to develop a reference board to demo DVD playback from a DVD CD using the data transport chip.

• Redesigned existing market video conferencing system and successfully consolidated three PCB boards into one PCB therefore reducing the cost from $50,000 to $5,000. Used PADs PCB v2.x to layout the boards and OrCAD schematic capture for the schematics.

Qualifications & Certifications

St Elizabeth HS Oakland CA


Laney College

Electrical Engineering

University of California

Electrical Engineering

San Jose State University

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